Consulting & research
AI-driven IC design,
grounded in engineering.
I help companies implement AI-driven analog, digital and mixed-signal IC design—from specification to sign-off—within their own tools and processes.
Raphael Viera
Assistant Professor
Mines Saint-Étienne
Secure Architectures and Systems (SAS)
Research in laser fault injection, hardware-security countermeasures, and photon emission analysis.
Expertise
01
AI-driven design workflows
Build AI-assisted design and verification flows around existing teams and tools, with engineers reviewing key decisions.
02
Hardware security
Research in fault injection, physical-attack analysis, and the design and evaluation of countermeasures.
Selected work
circuits for people and AI.
AiSIC — a circuit-design platform
AiSIC brings analog, digital, and mixed-signal examples together for people and AI. It connects circuit exploration with design and verification workflows.
Explore AiSICAcademic affiliation
Assistant Professor, Mines Saint-Étienne
Secure Architectures and Systems (SAS)
I hold a PhD in Microelectronics from the University of Montpellier (2018). Since joining SAS in 2020, my research has focused on fault injection and hardware security. I also teach analog design and cybersecurity.
Upcoming invited lecture
From Specification to Sign-Off
In 2026, I am scheduled to speak for Analogue Insight Ltd. about AI-driven IC design across bulk CMOS, FinFET, and FD-SOI technologies.
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Research, teaching, and projects
Browse publications, current and past projects, educational work, and community activities.